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What number is it correct to divide by your ADC counts as a first step in converting counts to voltage? For example, in a 10 bit ADC, is it correct to divide by 1024 or 1023?

I have always divided by 1024, which means that a full count would yield less than full scale voltage reading. I think this is a more accurate representation of the hardware, though, since there is usually an LSB of error. This is also what I've read in every datasheet, as well as various DSP literature and white papers from ADI and TI. Please prove me right (or wrong) with the detailed reasoning why!

Links to lit: http://www.ti.com/general/docs/litabsmultiplefilelist.tsp?literatureNumber=slyw038b

http://www.analog.com/en/education/education-library/data-conversion-handbook.html

http://www.analog.com/en/education/education-library/scientist_engineers_guide.html

montserrat
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  • please link the the literature you have read. – SignalProcessingJobs Oct 17 '18 at 15:13
  • Can you give an example where both may be correct and why? – montserrat Oct 17 '18 at 15:23
  • I am more of asking what is theoretically correct for an ideal ADC, with as much precision as you need, so you can assume FP. Also, I've always thought of it being your ADC's returned counts divided by the possible number of "steps"...hence 1024, instead of 1023 possible "values" that can be returned. – montserrat Oct 17 '18 at 15:30
  • https://stackoverflow.com/questions/892723/convert-adc-bins-into-voltage – SignalProcessingJobs Oct 17 '18 at 15:36
  • @spet Yea, that thread references the literature I cited above. It's basically what I've always done, always read (in theoretical and datasheets), and what makes sense to ME. I just feel that I don't have as strong of a theoretical explanation to anyone on the 2^n-1 side of the debate. – montserrat Oct 17 '18 at 15:43
  • there's no strong argument for anything here, @montserrat. There can't be - it's just an arbitrary scaling. – Marcus Müller Oct 17 '18 at 16:06
  • @MarcusMüller You may be correct. It may only be relevant in context like Stanley Pawlukiewicz suggested. If that is so, I wonder why there exists a common convention between the literature – montserrat Oct 17 '18 at 16:11
  • no, if anything, convert to physical numbers; you'll often notice that the difference e.g. between 1023 steps and 1024 steps is absolutely negligible if the ADC was chosen appropriately. – Marcus Müller Oct 17 '18 at 17:06
  • @MarcusMüller, true. One could argue that you might need that resolution, but if your desired resolution is equal to your ADC's, you probably chose the ADC wrong. Thanks :) – montserrat Oct 17 '18 at 18:07
  • It's of course bad to lose accuracy to bad scaling, but in the end, I know of very few cases where an algorithm depends on the absolute scale of samples. – Marcus Müller Oct 17 '18 at 18:15
  • Practical ADC's have bandwidth so you will get a different result between DC values and values derived from input signals at higher frequencies. Also the ADC resolution is never the resolution you can actually get due to analog artifacts such as non-linearities, ADC noise, S/H errors, spurs, etc. On the datasheet they will specify an Effective Number of Bits (ENOB) that would be your equivalent perfect ADC, and this ENOB goes down as your input frequency goes up, but is always less than the number of bits provided (otherwise they could give you more bits). – Dan Boschen Oct 18 '18 at 00:59
  • All of these effects swamp out any variation you would see between using 2^(n-1) and 2^n, that said the full scale rails of an ADC are typically given by their reference voltages (either a bipolar signal with plus/minus reference voltages or unipolar with ground and a positive reference), with maximum ADC corresponding to the positive reference voltage and minimum ADC corresponding to the lower reference voltage (ground or negative voltage). So every binary word out corresponds to a unique voltage and therefore 2^n levels. But as I explained above, you cannot distinguish between 1 binary level – Dan Boschen Oct 18 '18 at 01:02
  • (2^n )-1 not 2^(n-1) as I stated two comments earlier. – Dan Boschen Oct 18 '18 at 01:24

1 Answers1

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The correct answer depends on implementation and what you decide to call Full Scale; if the end points are included in the conversion mapping used, then the answer would be $2^n-1$ as I depict in the graphic below.

The easy way to see this is to consider a simple 3 bit converter which has 8 levels, for the conversion of a unipolar signal from 0 to 1V, where we specifically have mapped (in the design of the converter) 0V (+/- 1/2 lsb) to 000 and 1V (+/- 1/2 lsb) to 111:

3 bit mapping

Here we see clearly how with 8 levels the resulting mapping is given as

$$V_{out} = 1V\frac{b}{2^3-1}$$

where b is the digitized value of interest, in this case ranging from 0 to 7.

Because our digital range is inclusive of the end points of our voltage range, it would always be 1 less than the number of levels in this case.

Although not an ADC, but a counter example I could find showing the implementation dependence is A DAC implemented with an R-2R ladder (https://en.wikipedia.org/wiki/Resistor_ladder). This shows a mapping where a division of $2^n$ is used, and the full scale voltage IF based on the reference voltage used is never actually reached as an output of the DAC (but why not simply call "Full Scale" the voltage corresponding to the maximum digital value? - Here you see that it is simply a matter of how you decide to scale it).

Dan Boschen
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