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I am trying to implement a basic digital modulation scheme (BPSK) with a low data rate of 5 kbps. The requirement is to support a frequency offset of +/- 10 KHz. I would like to know what are the criteria to decide how much offset can be corrected? My burst data header is only 50 bits. I want to know if it is possible to track the frequency offset and also do the timing recovery (gardner) in the header bits.

Susan
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The answer is yes it is possible and any amount of frequency offset can be corrected to the extent your sampling rate is sufficiently high enough for unambiguous frequency resolution over ±10 KHz. A very simple frequency discriminator that can be used in a carrier tracking loop is further described at this post:Carrier frequency offset estimation for QPSK and asymmetrical spectrum and results in determining the frequency offset simply from the product of two successive (complex) samples given as $I_1Q_2-I_2Q_1$. For BPSK you can also remove the modulation from the frequency error result by first squaring the signal, in which case the result will be twice the actual frequency offset; which is of no consequence since the loop will drive the offset to 0 in any event).

This discriminator has unambiguous frequency resolution for IQ rotation up to 90° between samples. A 10 KHz frequency offset will rotate 90° if the sampling rate is 40 KHz, so as long as your sampling rate can be greater than this rate, this should be a very simple approach to carrier recovery / Doppler wipe-off (80 KHz if using the frequency doubling approach to strip the modulation).

The maximum possible offset sets your search window and the header duration if used for acquisition sets the carrier recovery Loop BW. The carrier Loop BW sets the acquisition SNR required (wider BW is faster but requires a higher SNR). So use a loop BW that is wide enough to settle for a step response in frequency change from 0 to 10 KHz within the time duration of 50 symbols. (And then the loop bandwidth can be further tightened once acquired if channel dynamics allow).

Dan Boschen
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  • Actually the header size is fixed to be 50 bits. I cant change it. I was planning to use a coarse freq recovery(fft based) to track the freq offset followed by coastas loop for fine recovery and then gardner for timing recovery?or should i use only coastas with large bw followed by timing recovery? Requirement is 1e-6 BER for 12dB SNR. Please suggest how to proceed? – Susan Jul 24 '20 at 13:51
  • Depending on your sampling rate I would simply use an approach like this as your discriminator your carrier recovery loop-- Look at what the maximum phase rotation would be at your maximum frequency offset to set your sampling rate there---keeping the rotation less than 90° for the capture range of BPSK. Hope this answers your questions! https://dsp.stackexchange.com/questions/67535/carrier-frequency-offset-estimation-for-qpsk-and-asymmetrical-spectrum/67555#67555 – Dan Boschen Jul 24 '20 at 14:02
  • .I have gone thru ur post. Still i am confused. my freq offset is 10*symbol rate.its very high so should i use a fft based freq estimater? is 50 bits header enough for that? – Susan Jul 24 '20 at 14:23
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    @Susan What is your maximum available sampling rate? At that sampling rate and your maximum frequency offset work through how much the symbol would rotate between successive samples. If that rotation can be less than 90° you can use a much simpler approach to determine the frequency error and close your loop (the one I referred you to) over doing a complete fft. Yes a 50 bit header is enough, it will set your carrier loop bandwidth to be wide enough to settle within that time. Use a wider loop BW for acquisition and then tighten if needed during tracking for better SNR – Dan Boschen Jul 24 '20 at 17:10
  • (to the extent channel dynamics allow). – Dan Boschen Jul 24 '20 at 17:12
  • I did some analysis myself after discussion. I1Q2-Q2I1 gives twice the offset( i.e if offset is set +/- 10 Khz this value becomes 20 khz). So my sample rate should be more than 80KHz not 40Khz (BPSK)
  • Header bits should not contain any transition (i.e all 1's) .If transitions I have to square them to remove it (BPSK). Should the error block in the costat loop be replaced by this or is it a parallel block to the costas loop.3. Cross product detector looks simple.Can I recover carrier in 2-3 symbols only? is it amplitude sensitive?
    • – Susan Jul 27 '20 at 11:47
  • As offset is more i have to do costas loop followed by gardner timing loop or nested loops?
  • I tried checking costas loop for wider carrier loop bandwidth (10khz for 1kbps symbol rate) but was behaving weirdly. Let alone 10 Khz cant get it locked for 10 Hz?
    • – Susan Jul 27 '20 at 11:47
  • Well the offset scaling is arbitrary, more important is it's linearity over the operating range as that effects its loop BW. 2-3 symbols is feasible but would be a wide loop BW and more challenging to design and could have noise issues-- I thought you said you have 50 symbols (Note that the loops don't run sequentially but concurrently--- locking within 10 symbols would be straight forward. There are a lot of design trades and we won't be able to resolve here (and they discourage back and forth discussion in the comments--- email me at boschen at loglin dot com and we can see if I can help) – Dan Boschen Jul 27 '20 at 11:51