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I am using an ADC (ltc2378) with a resolution of 20 bits.

Based on the datasheet this resolution corresponds to an LSB calculated by the equation ($2 V_{\text{ref}}/2^{20}$), i.e., 9.536 µV.

In order to achieve a better resolution of 24 bits as described in this document Silicon Labs Oversampling I have to oversample at a frequency

$$f_{\text{oversample}} = 4^{n_{\text{bits, additional}}} f_s$$

Assuming that the original sampling frequency of the signal is 62.5 Hz and we oversample to achieve 4 additional bits we will have to sample it at 16000 samples per second.

After oversampling the simple method of averaging is considered.

Assuming that we have an accumulator of at most 34 bits width ($2^{20}\cdot 16000$), from the generated result we are discarding the 10 bits by simply shifting on the right. My question is what it would be the newly achieved LSB after this process.

$2 V_{\text{ref}}/2^{24}$ or something else?

Marcus Müller
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MrT
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    hi, why did you repost this after you got an answer over at EE.SE, without even addressing the answer there or incorporating what you learnt in the question here? – Marcus Müller Jun 12 '23 at 12:09

1 Answers1

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By oversampling a standard ADC, we gain 1/2 a bit every time we double the sampling rate up to the limits of the spurious-free dynamic range, this is consistent with the OP's formula. (This is in contrast to sigma delta ADCs where we can gain many more bits with smaller oversampling factors).

The accumulator and the shift is an arithmetic average: the accumulator provides the summation, and a shift to the right of 10 bits is a divide by $2^{10}$. Therefore, if the range of the ADC is $2V_{ref}$, the lsb after the shift would have a weight referred to the input units of $2V_{ref}/2^{24}$.

Please see this other post which further details oversampling including consideration to the limits of spurious-free dynamic range and "effective number of bits" (ENOB).

Dan Boschen
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