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I have a replicated a Direct sequence spread spectrum link (schematics taken from ARRL SS handbook) and would like to measure performance characteristics such as process gain. I have 2 questions.

  1. I am using LSFR using 74164 for PN code generation which is clocked at 2MHz. Is it reasonable to say that the bit rate of PN code is 2*2MHz= 4Mb/s? The data is fed through a d-flip flop with 2khz clock. If not how to practically measure the bit rate as the oscilloscope shows the PN sequence but I can’t determine if it’s viewing individual bits or series of bits.

  2. to calculate the process gain I either need the bit rate of spreading sequence and the data or the bandwidth of each. For bit rate the question 1 will be enough but for BW do I need to use a spectrum analyzer? And if so what’s the criteria of BW is it ~90% of power? And is the process gain with both methods will be comparable?

Also do you suggest any other characteristics that is worth measuring for this link?

Thanks in advance!

1 Answers1

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I don't know what "74164" means, is this the polynomial used to create the feedback for the LFSR?

Regardless the bit rate is 2 MHz; the rate at which the sequence is updated. To be clear with an example, if the resulting code out of the LFSR proceeds as 1 0 1 1 0 .... as the "chips" of the code and each chip is updated at a 2 MHz rate, then the bit rate is 2 MHz.

The processing gain is $10\log(N)$ where $N$ is the number of chips in the sequence used to transmit one symbol (often this is the entire length of the code before it repeats). This is valid under white noise conditions, such that the noise from chip to chip is independent. Thus in the correlation process where the processing gain occurs, $\sum_N x[n]y[n]$, the signal components will increase by $20\log(N)$ while the noise components will only increase by $10\log(N)$ resulting in a net gain in SNR of $10\log(N)$.

Ultimately to measure processing gain, which is the change in SNR before and after correlation with the spreading sequence, the actual SNR should be measured for the signal before and after correlation which would confirm all assumptions made. This can be done by computing the cross-correlation of the signal+noise using a calibrated noise (such that the pre-correlation SNR is known) with a clean reference signal and converting that to SNR as explained in this link:

https://dsp.stackexchange.com/a/30854/21048

Dan Boschen
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  • Hi thanks for your input. My apologies, 74164 is a shift register TTL IC. So for process gain I just need to know the length of PN code? In my case it’s a maximal length (127). That’s odd because I read several books (Dixon’s for example ) and they all relate process gain to the chip rate,bit rate, bandwidth.. And for clarification I am doing measurements on an actual demo circuit. – Mohamed Abuain Feb 25 '24 at 22:50
  • Yes that’s right the chip length assuming white noise- consider that if you have a data rate and for each bit insert the N samples, the bandwidth will increase by a factor of N (as the data will toggle N times faster). – Dan Boschen Feb 26 '24 at 01:11
  • This may help you confirm: this link provides it as 10log(data rate/ chip rate) which is what I am saying: https://www.tutorialsweb.com/spread-spectrum/classification-of-ss-modulation-schemes.htm – Dan Boschen Feb 26 '24 at 13:44