0

Game Design

Let us create a little game with a seven-segment display (SSD). There are two inputs, “clk” and “stop”, and one output “dout(6:0)” that feeds the output to the seven segment display as shown in figure 3. Assume that the clock frequency is 1kHz. The idea behind this game is to have a continuous clockwise movement in the seven segment display segments. Momentarily, we would also like to overlap the four neighbouring segments. Thus, the sequence starting from ‘a’ should be

a -> ab ->b ->bc -> c -> cd-> d -> de -> e -> ef -> f -> fa -> a …. (continues)

The combined states of ab, bc, cd, de, ef, fa should only last for a few milliseconds. If stop is activated, then the circuit should return to the original state ‘a’ and remain so until stop is deactivated. Provide an FSM for this simple game approach and write the VHDL code and present the overall timing simulations. If you are asked to implement this design using the Nexys4 board, what additional VHDL design and implementation requirements would you have other than the XDC file? Please provide step-by-step discussion and solutions.

Transistor
  • 10,741
  • 2
  • 21
  • 31
Melinda Georgia Brown
  • 1
  • what is your question? – jsotola Mar 10 '24 at 05:55
  • where is figure 3? – jsotola Mar 10 '24 at 06:05
  • 1
    This looks like a project or graded assignment. We don't do those - this is something set to help you apply your material. If you have a particular, focused, question then we may help. – Solar Mike Mar 10 '24 at 07:49
  • I suggest that you [Edit] your question title to explain what aspect of VHDL requires help. Note that "Need help with" in the question title is redundant as every question "needs help with". Fix that and you may attract someone who is familiar with the topic. But you need to show your own attempt first. – Transistor Mar 10 '24 at 14:53

0 Answers0